1. Field of the Invention
The present invention relates to an amplifier circuit with a voltage interpolation function, and more particularly, to an amplifier circuit utilizing fewer differential pairs for realizing the voltage interpolation function.
2. Description of the Prior Art
With increases in size and resolution of liquid crystal display (LCD) panels, layout area of driver chips is also increasing, and thus, industry professionals must focus on ways to reduce chip area and production cost. Please refer to FIG. 1. FIG. 1 is a schematic diagram of a driver chip 10 in a conventional LCD panel. The driver chip 10 is utilized for converting an image signal S_DATA with a resolution of N bits to an analog output voltage Vo for driving corresponding pixels, and includes 2N reference voltage wirings 11, a digital-to-analog converter 12 and a voltage buffer 13. The reference voltage wirings 11 are utilized for providing 2N Gamma reference voltages generated by a reference voltage generator (not shown in FIG. 1). The digital-to-analog converter 12 is utilized for switching to output one of the 2N Gamma reference voltages according to the image signal S_DATA. The voltage buffer 13 then generates the analog output voltage Vo needed by rear stage circuits according to the reference voltage outputted by the digital-to-analog converter 12, and provides adequate driving currents for the rear stage circuits as well.
As shown in FIG. 1, an N-bit driver chip generally requires 2N reference voltage wirings, and thus, when the resolution of the driver chips is increased, the number of the reference voltage wirings 11 and circuit elements inside the analog-to-digital converter 12 increases greatly, resulting in considerable chip sizes. In this case, if the voltage buffer 13 can be realized by amplifier circuits with voltage interpolation functions, half the number of the reference voltage wirings 11 and the circuit elements inside the analog to digital converter 12 can be removed, since the reference voltages being removed are made up for by interpolation of the amplifier circuits.
Please refer to FIG. 2. FIG. 2 is a schematic diagram of a conventional amplifier circuit 20 with a function of voltage interpolation. The amplifier circuit 20 is utilized for interpolating input voltages V1 and V2 to generate an output voltage Vo according to a superposition principle, and includes N-type differential pairs 21 and 22, P-type differential pairs 23 and 24, and an output stage 25. The N-type differential pairs 21 and 22 have a circuit structure similar to that of a Gilbert cell, and are respectively formed with two matched N-type transistors and one biasing transistor. Input terminals of the N-type differential pairs 21, i.e. gate electrodes of transistors MN1 and MN2, are respectively coupled to the first input voltage V1 and the output voltage Vo, while input terminals of the N-type differential pairs 22, i.e. gate electrodes of transistors MN3 and MN4, are respectively coupled to the second input voltage V2 and the output voltage Vo. Similarly, the P-type differential pairs 23 and 24 also have a circuit structure similar to that of a Gilbert cell, in which input terminals of the P-type differential pairs 23, i.e. gate electrodes of transistors MP1 and MP2, are respectively coupled to the first input voltage V1 and the output voltage Vo, while input terminals of the P-type differential pairs 24, i.e. gate electrodes of transistors MP3 and MP4, are respectively coupled to the second input voltage V2 and the output voltage Vo. Further, output terminals of the N-type differential pairs 21 and 22 are respectively coupled to the output stage 25 through nodes A and B, and output terminals of the P-type differential pairs 23 and 24 are respectively coupled to the output stage 25 through nodes C and D.
In operation, since output currents of the differential pairs are proportional to the product of input voltages and their transconductances, if the transconductances of the N-type differential pairs 21 and 22 are adjusted to be the same, the output voltage Vo generated by the N-type differential pairs 21 and 22 will be an average value of the first input voltage V1 and the second input voltage V2. Likewise, if the transconductances of the P-type differential pairs 23 and 24 are adjusted to be the same, the output voltage Vo generated by the P-type differential pairs 23 and 24 will be an average value of the first input voltage V1 and the second input voltage V2 as well. The adjustment of the transconductances of the differential pairs can be achieved by adjusting corresponding bias currents or transistor sizes, which is well known by those in the art and not narrated herein. Therefore, by the superposition principle, the output voltage Vo can be expressed as follows:
      Vout    =                                        (                          gmp              +              gmn                        )                    ⁢                                          ⁢          V          ⁢                                          ⁢          1                +                              (                          gmp              +              gmn                        )                    ⁢                                          ⁢          V          ⁢                                          ⁢          2                            2        ⁢                                  ⁢                  (                      gmp            +            gmn                    )                      ,
in which gmn and gmp respectively represent the transconductances of the N-type differential pairs and the P-type differential pairs, so the output voltage Vo is equal to the average value of the input voltages V1 and V2.
Therefore, when using the amplifier circuit 20 with the voltage interpolation function in the driver chips, additional reference voltages can be generated for reducing required reference voltage wirings and the number of circuit elements inside the digital-to-analog converter, so as to reduce chip sizes and lower production cost. However, the amplifier circuit with the voltage interpolation function has to use two sets of the N-type and the P-type differential pairs, which increases the circuit area of the voltage buffer circuit itself instead.